Crate ppv_lite86

source · [−]

Re-exports

pub use self::arch::vec128_storage;

pub use self::arch::vec256_storage;

pub use self::arch::vec512_storage;

Macros

dispatch

Generate the full set of optimized implementations to take advantage of the most important +hardware feature sets.

dispatch_light128

Generate only the basic implementations necessary to be able to operate efficiently on 128-bit +vectors on this platfrom. For x86-64, that would mean SSE2 and AVX.

dispatch_light256

Generate only the basic implementations necessary to be able to operate efficiently on 256-bit +vectors on this platfrom. For x86-64, that would mean SSE2, AVX, and AVX2.

Traits

AndNot

ArithOps

Ops that depend on word size

BSwap

BitOps0

Ops that are independent of word size and endian

A vector composed one or more lanes each composed of four words.

Machine

MultiLane

A vector composed of multiple 128-bit lanes.

Exchange neigboring ranges of bits of the specified size

UnsafeFrom

VZip

Combine single vectors into a multi-lane vector.

Vec2

A vector composed of two elements, which may be words or themselves vectors.

Vec4

A vector composed of four elements, which may be words or themselves vectors.

Vec4Ext

Vec4 functions which may not be implemented yet for all Vec4 types. +NOTE: functions in this trait may be moved to Vec4 in any patch release. To avoid breakage, +import Vec4Ext only together with Vec4, and don’t qualify its methods.

Vector

Words4

A vector composed of four words; depending on their size, operations may cross lanes.

Crate ppv_lite86

Re-exports

Modules

Macros

Traits